The present invention relates to data processing systems and more particularly to apparatus for efficiently processing instructions of different formats in the same data processing system.
In data processing systems having the capability of emulating another data processing system, problems regarding the different architectures of the two systems are usually encountered. For example, one system, for example the emulated system, may be a byte or character operation oriented system, whereas the system emulating might be a multi-byte or word operation oriented system. Further, for variable byte operands, the length thereof may in the emulated system be specified by a flag bit in the last byte of the operand and in the emulating system by a count which is decremented as each byte of the operand is processed. Usually there are several solutions to the problem, for example, one of them being the use of software and/or firmware only, without any additional hardware in the system to perform the specified function. This solution though useful would impair the performance of the system because of the excess execution time as for example in masking operations which may be required. Another solution is to implement the emulation in terms of hardware as well as firmware.
The implementation of hardware and firmware in the emulation system envisioned, is the adding of a unit of hardware, for example, to the central data processing system which unit is called an emulation unit and which performs the functionality of the emulated system within the performance specifications of the system doing the emulation. This requirement of providing such emulation is increased where for example, as in the present invention, the data processing system includes a different architecture from that of the system to be emulated.
Thus, without disturbing the functionality of the system doing the emulation, the instruction code must be adapted and efficient switching means must be provided so that in the process of switching the execution process between the emulation unit and the arithmetic logic unit of the system, the operating speed of the total system is not severely impaired.
It is accordingly an object of the invention to provide an improved switching mechanism for switching in a data processing system between its native mode and its non-native mode of operation.
It is a further object of the invention to provide a data processing system having efficient switching means for enabling the execution of instructions in either its arithmetic logic unit or an emulation unit coupled with the system.